Researchers from MIT, in collaboration with scientists from Analog Devices, have successfully built a CPU based on RISC-V architecture entirely using CNTs. Called RV16X Nano, this CPU is currently only capable of executing a classic "Hello World" program. CNT is a natural semiconductor, however, when manufactured, it is being made as a metallic nanotube. That is due to the fact that metallic nanotubes are easier to integrate into the manufacturing ecosystem. Its has numerous challenges in production because CNTs tend to position themselves randomly in XYZ axes. Researchers from MIT and Analog Devices solved this problem by making large enough surfaces so that enough random tubes are positioned well. The CPU is based on the RISC-V architecture, particularly it is designed to handle 32-bit wide instructions in a 16-bit wide memory address design. Being that all stages of the CPU pipeline (Instruction Fetch, Decode, Register Read, Execute and Write Back) are 16-bit in width, the CPU is officially declared as 16-bit. It uses 14,000 logic gates, like AND or NOT gates, to become a fully functional design. Given the careful manipulation of nanotubes, researchers managed to pull off 100% yield, meaning that all of the 14,000 gates worked correctly. The technology isn't perfect, yet. The chip ran at a very low clock speed of only 10 kHz, which means that your average CPU is an order of magnitude faster than this. With all of the flaws, this demonstration is an important achievement for the technology - a proof of concept. It shows that you are able to manufacture a working example of CPU based on something that doesn't require silicon and possibly is even better than it. We just haven't perfected all of the bits and pieces required to get CNTs at the same level of performance we already have.