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Updated:03:13 AM EDT Aug 10


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AMD Barcelona Power Savings Techniques - [hardware]
03:31 AM EST - Feb,12 2007 - post a comment

AMD claims that the TDP of Barcelona is 15% lower than the TDP provided and the lowest power quad-core at a typical power consumption of less than 58W. AMD has not provided detailed specifications about the processor, but confirmed that Barcelona will integrate 2 MB of shared L3 cache as well as an improved virtualization feature that, according to AMD, can provide a performance gain of "up to 43% over non AMD-V driven applications." Here are some of the power saving techniques:
1. Flexible clocking scheme - PLLs for each core, clocked independently and varies clock speed depending on usage. However, voltage cannot be varied independently on each core.
2. DDR Power management - Barcelona is able to shut down read channels if memory is only using writes and vice versa. This technique reduces the power consumption of the memory controller by up to 80% on "many" workloads.
3. Finer Clock Gating - K10 gets 'really aggressive' on the fine grained clock gating and improves coarse grained a bit too. It can either power down entire blocks or "increasingly" finer sections of the chip.
4. New PowerNow! mode - No drivers needed like Intel's where it is able to operation independently of the OS.

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