In his opening keynote speech at Fall IDF today, Intel CEO Paul Otellini revealed new details about the firm's next-generation CPU microarchitecture, code-named Nehalem. The design is now complete, and Otellini claimed it's on track for delivery in the second half of 2008. In fact, he displayed a wafer of Nehalem chips and reported that each chip will be comprised of approximately 731 million transistors. In its 'largest configuration,' Nehalem will pack eight CPU cores onto a single die. Each of those cores will present the system with two logical processors and be able to execute two threads via simultaneous multithreading (SMT) - a la HyperThreading. So a single Nehalem chip will be able to execute 16 threads at once!