HKEPC reports that Intel will release a new embedded processor with an integrated memory controller, north bridge, and south bridge. Slides, which are presumably from Intel roadmap, indicate that Intel Tolapai system-on-a-chip (SoC) will include a Pentium M-like microprocessor with 256KB L2 cache, integrated dual-channel DDR2 memory controller that supports PC2-3200 (400MHz), PC2-4200 (533MHz), PC2-5300 (667MHz) and PC2-6400 (800MHz) memory modules, PCI Express controller as well as I/O bridge that features support for Serial ATA, USB, Gigabit Ethernet and so on. The x86 processing engine on the chip will operate at 600MHz, 1.06GHz or 1.2GHz clock-speeds and its thermal design power varies from 13W to 25W.

Intel will manufacturer Tolapai on a 65-nanometer fabrication process. It will feature 1,088-ball FCBGA packaging that measures in at 1.092-mm. Unlike the Pentium M and Core architecture processors, Tolapai's CPU-core will have hardware accelerated security encryption and decryption functions like VIA's C7 and C3 Nehemiah-core processors. Supported hardware security encryption methods include: AES, 3DES, RC4, MD5, SHA-1, SHA-224, SHA-256, SHA-384, SHA-512, HMAC, ESA and DSA. Tolapai client's reference board is set to be available in Q2 2006 and the final product is projected to ship in late 2007.